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Compute Express Link 2.0 specification published

CXL 2.0 retains backward compatibility with CXL 1.1 and 1.0

The CXL Consortium, the industry standards body for the development of Compute Express Link (CXL) technology, has announced the release of the CXL 2.0 specification. Recall that CXL is an open protocol for high-speed intra-system connections, which was started by Intel. It handed it over to the CXL consortium last spring .

Compute Express Link 2.0
Compute Express Link 2.0

Compute Express Link 2.0 specification published

The CXL protocol ensures minimal latency in the exchange of data between the CPU and accelerators, memory buffers and I / O devices, as well as consistency of memory contents in the memory space of the CPU and the memory of the attached devices. The CXL 2.0 specification adds switch support for fanout to connect to more devices; pooling memory to improve memory efficiency and provide memory on demand; and support for persistent memory.

In addition, CXL 2.0 adds support for hot-swappable CXL devices, channel-level data integrity and encryption (CXL IDE), and support for a wide variety of industry form factors and standardized management interfaces, which should simplify implementation. This provides full backward compatibility with CXL 1.1 and 1.0.

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