Intel talks about 28-core 10nm Ice Lake processor for servers and HEDT
At the HotChips 32 industry conference held these days, Intel revealed details of its forthcoming Ice Lake-SP server processors. These are the first 10nm Intel processors that will step outside the mobile segment, and the first “big” Intel processors, which are based on a more perfect microarchitecture than Skylake.
Intel plans to offer processors codenamed Ice Lake-SP as a solution for mainstream server systems with one and two sockets. They will be part of the Whitney platform, which currently uses 14nm Cascade Lake-SP processors. Despite the fact that Ice Lake-SPs represent a rather serious step forward in terms of microarchitecture, they, like their predecessors, will continue the Xeon Scalable lineup. It is also logical to assume that the next generation Intel Core-X HEDT processors will be made on the basis of a design similar to Ice Lake-SP.
The base version of Ice Lake-SP, shown on HotChips, assumes the presence of 28 Sunny Cove cores in the processor and an eight-channel memory controller implemented by four independent DDR4 controllers. Intel is going to make a fundamental leap from mobile Ice Lake with four cores straight to 28-core chips using the improved 10nm SuperFin workflow, presented last week.
By themselves, the Sunny Cove cores in Ice Lake-SP do not differ too much from similar cores from mobile 10nm processors. Compared to Skylake, the input port of the pipeline and the execution domain have undergone a noticeable improvement. As a result, Sunny Cove cores can process up to five instructions per clock (versus four in previous processors), have improved branch prediction, extended register files, and scheduler buffers. To this, it is necessary to add an increase in the volume of the L1 data cache from 32 to 48 KB and expansion from 1.0 to 1.25 MB of the L2 cache, performed simultaneously with an increase from 1.5 to 2 thousand entries of the L2 TLB table size.
Ultimately, all these changes provide an 18% increase in the specific performance of the core compared to the Skylake microarchitecture. In addition to this, Intel has added an additional FMA512 block to the server version of Sunny Cove, aimed at accelerating the processing of AVX-512 instructions. There was no such block in Ice Lake mobile processors, so Sunny Cove server cores will differ from consumer versions. At the same time, Intel promises that the use of vector instructions in Ice Lake-SP will not lead to a significant decrease in the operating frequency of the processor, as is happening now. It is stated that the CPU frequency, even when the AVX-512 units are turned on, will not decrease by more than 15%, but in most cases, it will be possible to do without it.
Ice Lake-SP will continue to use Mesh networking for inter-core connectivity. But now the control functions and data exchange will be distributed on different independent circuits. This should increase the responsiveness of the entire network and reduce latency. An example of a positive effect is a decrease in the latency of internuclear exchange from 20 to 7 ns.
Certain changes have taken place in the external interfaces as well. The number of UPI links required to organize interprocessor communications has grown from two to three. And instead of the two three-channel memory controllers used in Skylake-SP, four two-channel controllers are now used. Intel promises that such channel reallocation will improve memory efficiency and simplify access control. Also promised support for full memory encryption (using the AES-XTS algorithm with a 128-bit key) and compatibility with Optane Persistent Memory 200 (Barlow Pass) modules. In addition, Ice Lake-SP adds support for PCI Express 4.0, implemented by four controllers with 16 lanes each.
It should be understood that the presentation of Ice Lake-SP at HotChips is rather a preliminary stage in the multi-stage process of bringing new server processors to the market. Therefore, at the moment, many questions still remain unanswered. For example, it is not clear if the 28-core Ice Lake-SP is the maximum, and if Intel has an even more powerful Extreme Core Count die with more cores in stock. The next-generation 10nm server processors are slated to be announced later this year, with more details expected in the coming months.
