AMD updated its investor presentation earlier this week on its website. Although the document itself dates from June, there were subtle changes in the slides compared to the July version of the corporate presentation. In the consumer segment, the portrait of Matisse’s successors is now as clear as possible. AMD now does not hide that the fourth generation Ryzen processors will combine the Zen 3 architecture and 7nm manufacturing technology. At the level of lithography, no distinctive features from their predecessors are demonstrated – formally, this is still the same 7-nm technical process. Most likely, it will receive some improvements, but at the level of formal designations, AMD simply wants to rule out disagreements with the internal TSMC classification.

Other important revelations about future AMD processors are made by the German resource HardwareLUXX, which has obtained access to the company’s documentation for official use. It once again states that processors with the Zen 3 architecture will receive enlarged eight-core CCX complexes, in which the third-level cache shared between every eight cores will have a volume of 32 MB. Previous generations of processors with Zen and Zen 2 architecture had four-core CCX complexes and divided the third-level cache into 16 MB segments for every four cores, which somewhat limited performance on certain operations.

Provides details on the expected performance gains from the transition to Zen 3 architecture in the server segment. Specific performance in integer operations should increase by 15%. If we consider EPYC processors with 64 cores, then the performance can increase by 10-15%, for models with 32 cores the increase can reach 20% or more. The latter disparity is due to the fact that processors with fewer cores will be able to offer higher clock speeds, which will raise the overall level of performance.

The successors to Milan with the Genoa designator also have a lot of important information. As you know, they will be produced using 5nm technology in 2022, so AMD will be able to increase the number of cores per processor socket. In the Genoa family, this number will exceed 64 pieces. The number of threads per core will remain the same – two, whatever the old rumors say.

Genoa processors will use the new Socket SP5 design. It will be required to support the DDR5 memory and PCI Express 5.0 interface. It is assumed that 5nm EPYC processors will also provide support for NVDIMM-P memory modules, which can be considered an alternative to Intel Optane DC. The new platform will slightly raise the TDP bar – from 225 to 240 watts. Most likely, this increase is due to the support of new interfaces and an increase in the number of processor cores, and the transition to 5-nm technology compensates for it to some extent.